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AS5030
Datasheet - A p p l i c a t i o n I n f o r m a t i o n
8.4 Programming Verification
After programming, the programmed OTP bits may be verified in two ways:
- By digital verification:
this is simply done by sending a READ OTP command (#0F H ). The structure of this register is the same as for the OTP PROG or OTP WRITE
commands.
- By analog verification:
By sending an ANALOG OTP READ command (#09 H ), pin PROG becomes an output, sending an analog voltage with each clock, representing
a sequence of the bits in the OTP register. A voltage of <500mV indicates a correctly programmed bit (“1”) while a voltage level between 2.2V
and 3.5V indicates a correctly unprogrammed bit (“0”). Any voltage level in between indicates improper programming.
Figure 23. Analog OTP Verification
+5 V
VDD
13
VDD
Output
11
CS
VDD
Micro
Controller
Output
I/O
10
12
CLK
DI O
AS5030
100n
2
PROG
VSS
V
C1
14
C2
15
VSS
3
VSS
8.5 AS5030 Status Indicators
Refer to 16-bit Read Command on page 23 .
8.5.1
C2 Status Bit
This bit represents the hardware connection of the C2 configuration pin (#15) to determine, which hardware configuration is selected for the
AS5030 in question.
C2 = low: pin C2 is ‘low’, indicating that the AS5030 is in 3-wire mode or a member of a 2-wire daisy chain connection (except the last)
C2 = high: pin C2 is ‘high’, indicating that the AS5030 is in 2-wire mode and/or the last member of a 2-wire daisy chain connection
8.5.2
Lock Status Bit
The Lock signal indicates the ADC lock status. If Lock = low (ADC unlocked), the angle information is invalid.
To determine a valid angular signal at best performance, the following indicators should be set:
Lock = 1
AGC > 00 H and < 2F H
Note: The angle signal may also be valid (Lock = 1), when the AGC is out of range (00 H or 2F H ), but the accuracy of the AS5030 may be
reduced due to the out of range condition of the magnetic field strength.
www.ams.com/AS5030
Revision 2.4
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